Hutton Close, Crowther Ind Est, Washington, Tyne & Wear NE38 0AH, England
Email: enquiry@isocomoptocouplers.com - Tel: +44 (0)191 4166546 - Fax: +44 (0)191 4155055
Hutton Close, Crowther Ind Est, Washington, Tyne & Wear NE38 0AH, England
Email: enquiry@isocomoptocouplers.com
- Tel: +44 (0)191 4166546 - Fax: +44 (0)191 4155055
Circuit
Features
Description
Absolute Maximum
Ratings
Recommended Operating Conditions
Truth Table
Electrical
Characteristics
Switching Characteristics
Home Page
Very High Speed: 65ns (IL100)
Typical Propagation Delay Time
DTL/TTL
Compatible - 5V Supply
Three State Output Logic for Multiplexing
Built-In
Schmitt Trigger to avoid Oscillation
Faraday Shielded Photodetector for
Improved Common Mode Rejection
UL Recognised
The IL100 and IL101 are optically-coupled pairs consisting of a Gallium Arsenide Phosphide LED and a silicon monolithic integrated circuit including a photodetector. High speed digital information can be transmitted by the device while maintaining a high degree of electrical isolation between input and output. They can be used to replace pulse transformers in many digital interface applications. A built-in Schmitt Trigger provides hysteresis to reduce the possibility of oscillation. Surface Mount Option Available.
1. The IL100 and IL101 are defined in terms of positive logic.
2. A
ceramic capacitor (0.01µF min) should be connected from pin 8 to pin 5 to
stabilise the operation of the switching amplifier; failure to do so may inpair
the switching properties.
3. All voltages are referenced to network ground
(pin 5). Current flowing toward a terminal is considered positive.
4. No
external pull-up is required for a logic (1).
Absolute Maximum Ratings (25°C) | |
| Storage Temperature: Operating Temperature: Lead Soldering: Input-to-Output Isolation Voltage: |
-55°C to +125°C 0°C to +70°C 260°C for 10s, 1.6mm below seating plane ±1500V (IL101) ±2500V (IL100) |
Input Diode | |
| Forward Current: Reverse Voltage: Enable Voltage: |
10mA 5V 5.5V (not to exceed Vcc by more than 500mV) |
Output Transistor | |
| Supply Voltage VCC: Current IO: Voltage VO: Collector Power Dissipation: |
7V 100mA 7V 100mW |
| PARAMETER | SYMBOL | MIN | MAX | UNIT |
|---|---|---|---|---|
| Input Current, High Level | IIN (1) | 10 | mA | |
| Supply Voltage, Output | VCC | 4.5 | 5.0 | V |
| Fan Out (TTL Load) | N | 10 | ||
| Operating Temperature | TA | 0 | 70 | °C |
| INPUT | ENABLE | OUTPUT |
|---|---|---|
| 1 | 1 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | Off |
| 0 | 0 | Off |
Electrical Characteristics(Over recommended temperature Ta= 0°C to 70°C u.o.s.) | |||||||
| SYMBOL | PARAMETER | CONDITIONS | MIN | TYP | MAX | UNIT | NOTES |
|---|---|---|---|---|---|---|---|
| VOUT(0) | Logic (0) Output Voltage | VCC=5.5V, VG=2.4V, IOUT(SINKING)=16mA, IIN=(IL101: 10mA; IL100: 5mA) |
0.4 | 0.6 | V | ||
| IG(0) | Logic (0) Gate Current | VCC=5.5V, VG=0.5V | -1.6 | -2.0 | mA | ||
| IG(1) | Logic (1) Gate Current | 0 | mA | ||||
| ICC(1) | Logic (1) Supply Current | VCC=5.5V, VG=0.5V, IIN=0 | 18 | 22 | mA | ||
| ICC(0) | Logic (0) Supply Current | VCC=5.5V, VG=0.5V, IIN=10mA | 18 | 22 | mA | ||
| ICC | VCC=5.5V, VG=2.4V, IIN=0 | 13 | 16 | mA | |||
| VCC=5.5V, VG=2.4V, IIN=10mA | 17 | 21 | mA | ||||
| BVIO | Insulation Voltage (Input to Output) | TA=25°C | IL101: 1500 IL100: 2500 |
V | 5 | ||
| RIO | Resistance | VIO=500V, TA=25°C | 10 | ohm | 5 | ||
| CIO | Capacitance | f=1MHz, TA=25°C | 0.6 | 0.8 | pF | 5 | |
| CMRV(1) | Common Mode Rejection Voltage to Logical (0) Level | f=10MHz, RL=350ohm, TA=25°C, VOUT(MIN)=2V, IIN=0mA | 60 | Vac p-p | 6 | ||
| CMRV(0) | Common Mode Rejection Voltage to Logical (1) Level | f=10MHz, RL=350ohm, TA=25°C, VOUT(MAX)=0.6V, IIN=7.5mA | 60 | Vac p-p | 6 | ||
| CTR | Current Transfer Ratio | VCC=5V, RL=100ohm, IIN=5.0mA, TA=25°C | 1000 | % | 7 | ||
| VF | Forward Current | IIN=10mA, TA=25°C | 1.2 | 1.5 | 1.75 | V | 8 |
| BVR | Reverse Breakdown Voltage | IIN=10µA, TA=25°C | 5 | V | |||
| CIN | Capacitance | V=0, f=1MHz, TA=25°C | 25 | pF | |||
| IIN(1) | Logic (1) Input Current to ensure Logic (0) Output | 5 | mA | ||||
| IIN(0) | Logic (0) Input Current to ensure Logic (1) Output | 250 | µA | ||||
| VG(1) | Logic (1) Gate Voltage | 2.0 | V | ||||
| VG(0) | Logic (0) Gate Voltage | 0.8 | V | ||||
| IOUT(OFF) | VCC=5.5V, VO=1.5V, VG=0, IIN=0.10mA | -100 | +100 | µA | |||
Switching Characteristics | |||||||
| SYMBOL | PARAMETER | CONDITIONS | PART | TYP | MAX | UNIT | NOTES |
| tPD(1) | Propagation Delay Time to Logical (1) Level | RL=350ohm, CL=15pF, TA=25°C,
VCC=5V, IL100: IIN=7.5mA, IL101: IIN=10mA |
IL100 | 65 | 75 | ns | 1 |
| IL101 | 100 | 200 | ns | 1 | |||
| tPD(0) | Propagation Delay Time to Logical (0) Level | IL100 | 65 | 75 | ns | 2 | |
| IL101 | 100 | 200 | ns | 2 | |||
| tR-tF | Output Rise-Fall (10-90%) | IL100 | 15 | ns | |||
| tG(1) | Propagation Delay Time of Gate VG(1) to VG(0) | RL=350ohm, CL=15pF, TA=25°C, VCC=5V, IIN=7.5mA, VG(1)=2V, VG(0)=0.5V | IL100 | 15 | ns | 3 | |
| tG(0) | Propagation Delay Time of Gate VG(0) to VG(1) | IL100 | 15 | ns | 4 | ||
1. The tpd(1) propagation delay is measured from the 3.75mA point on the
trailing edge of the input pulse to the 1.5V trailing edge of the output pulse.
2.
The tpd(0) propagation delay is measured from the 3.75mA point on the leading
edge of the input pulse to the 1.5V leading edge of the output pulse.
3. The
tg(1) gate propagation delay is measured from the 1.5V point of the trailing
edge of the input pulse to the 1.5V point on the trailing edge of the output
pulse.
4. The tg(0) gate propagation delay is measured from the 1.5V point
on the input pulse to the 1.5V point on the leading edge of the output pulse.
The input diode is DC biased to 10mA (Iin(1)).
5. Pins 2,3 shorted together,
and pins 5,6,7,8 shorted together.
6. CMRV(1) is the maximum tolerable
common mode voltage to assure that the output will remain in a logic (1) state
(Vout > 2.0V). CMRV(0) is the maximum tolerable common mode voltage to assure
that the output will remain in a logic (0) state (Vout < 0.6V).
7. DC
Current Transfer Ratio is defined as the ratio of the output collector current
to the forward bias input current times 100%.
8. At 10mA, Vf decreases with
increasing temperature at the rate of 1.6mV/°C.
Isocom takes great effort to ensure accurate data, but regrettably cannot be held liable for any error on its website. Visit File Lists to confirm old printouts are up-to-date.