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ICPL2630
Dual TTL Compatible Optoisolator

Circuit and Package
Features
Description
Absolute Maximum Ratings
Recommended Operating Conditions
Electrical Characteristics
Switching Characteristics

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Circuit and Package

Units: mm DIL
a 0-13 degrees
b 6.10-6.60
d 2.54 Typ
f 3.29 Min
h 3.25-3.75
k 0.48-0.56 tip,1.1-1.4 shoulder
l 9.40-9.90
s 7.62 Typ
x 0.20-0.30

Features

LSTTL/TTL Compatible 5 V Supply
Ultra High Speed
Low Input Current Required
High Common Mode Rejection
Guaranteed Performance over Temperature
Withstand Test Voltage 3000Vdc
Typical Data Rate 10 Mbit/s

Description

The ICPL2630 consists of a pair of inverting optically coupled gates each with a GaAsP emitting diode and a unique integrated detector. The photons are collected in the detector by a photodiode and then amplified by a high gain linear amplifer that drives a Schottky clamped open detector output transistor. Each circuit is temperature, current and voltage compensated. This unique isolator design provides maximum DC and AC circuit isolation between input and output while achieving LSTTL/TTL circuit compatibility. The isolator operational parameters are guaranteed from 0°C to 70°C, such that a minimum input current of 5mA will sink an eight gate fan-out (13mA) at the output with 5 volt Vcc applied to the detector. This isolation and coupling is achieved with a typical propagation delay of 57ns. Surface Mount Option Available.
All electrical parameters are 100% tested. Specifications are guaranteed to a cumulative 0.65% AQL.

Absolute Maximum Ratings (25°C)

Storage Temperature:
Operating Temperature:
Lead Soldering:
-55°C to +125°C
0°C to +70°C
260°C for 10s, 1.6mm below seating plane

Input Diode (each channel)

Peak Forward Current IF:
Average Forward Current IF:
Reverse Voltage VR:
30mA (duration <= 1ms)
15mA
5V

Output Transistor (each channel)

Supply Voltage VCC:
Current IO:
Voltage VO:
Collector Power Dissipation:
7V (1 minute max)
16mA
7V
60mW

Recommended Operating Conditions

PARAMETER SYMBOL MIN MAX UNIT
Input Current, Low Level, Each channel IFL 0 250 µA
Input Current, High Level, Each channel IFH 6.3 (*) 15 mA
Supply Voltage, Output VCC 4.5 5.5 V
Fan Out (TTL Load) N
8
Operating Temperature TA 0 70 °C

* 6.3mA condition permits at least 20% CTR degradation guardband. Initial switching threshold is 5mA or less.

Electrical Characteristics

(Over recommended temperature Ta= 0°C to 70°C u.o.s.; all typical values at Vcc=5V, Ta=25°C u.o.s.)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT NOTES
IOH High Level Output Current VCC=VO=5.5V, IF=250µA
40 250 µA 3
VOL Low Level Output Voltage VCC=5.5V, IF=5mA, IOL(sinking)=13mA 0.4 0.6 V 3
ICCH High Level Supply Current VCC=5.5V, IF=0, (both channels) 15 30 mA
ICCL Low Level Supply Current VCC=5.5V, IF=10mA, (both channels) 27 36 mA
IIO Input-Output Insulation Leakage Current TA=25°C, RH=45%, t=5s, VIO=3000Vdc
1.0 µA 4
RIO Resistance TA=25°C, VIO=500V 1000
Gohm 4
CIO Capacitance TA=25°C, f=1MHz 0.6
pF 4
VF Input Forward Voltage TA=25°C, IF=10mA 1.5 1.75 V 6,3
BVR Input Reverse Breakdown Voltage TA=25°C, IR=10µA 5

V
CIN Input Capacitance VF=0, f=1MHz
60
pF 3
CTR Current Transfer Ratio IF=5mA, RL=100ohm 700
% 5
RII Resistance Input - Input VII=500V 100
Gohm 7
CII Capacitance Input - Input f=1MHz 0.27
pF 7

Switching Characteristics

(Ta=25°C, Vcc=5V)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT NOTES
tPLH Propagation Delay Time to High Output Level RL=350ohm, CL=15pF, IF=7.5mA
57 75 ns 1
tPHL Propagation Delay Time to Low Output Level 45 75 ns 2
tR Output Rise Time (10-90%) 25
ns 3
tF Output Fall Time (90-10%) 35
ns
CMH Common Mode Transient Immunity at Logic High Output Level VCM=10Vp-p, RL=350ohm, IF=0mA, VO(min)=2V 50
V/µs 4
CML Common Mode Transient Immunity at Logic Low Output Level VCM=10Vp-p, RL=350ohm, IF=7.5mA, VO(max)=0.8V -150
V/µs 4

Notes

  1. The tPLH (tPHL) propagation delay is measured from the 3.75mA point on the trailing (leading) edge of the input pulse to the 1.5V point on the trailing (leading) edge of the output pulse.
  2. Each channel.
  3. Measured between pins 1,2,3,4 shorted together and pins 5,6,7,8 shorted together.
  4. Common mode transient immunity in Logic High (Low) Level is the maximum tolerable, positive (negative), dVcm/dt on the leading (trailing) edge of the common mode pulse signal, Vcm, to ensure that the output will remain in a Logic High (Low) state, ie. Vo>2.0V (Vo<0.8V).
  5. DC Current Transfer Ratio is defined as the ratio of the output collector current to the forward bias input current times 100%.
  6. At 10mA Vf decreases with increasing temperature at the rate of 1.6mV/°C.
  7. Measured between pins 1 and 2 shorted together and pins 3 and 4 shorted together.



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