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6N137
LSTTL/TTL Compatible High Speed Optoisolator

Circuit and Package
Features
Description
Recommended Operating Conditions
Absolute Maximum Ratings
Electrical Characteristics
Switching Characteristics

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Circuit and Package

Units: mm DIL
a 0-13 degrees
b 6.10-6.60
d 2.54 Typ
f 3.29 min
h 3.25-3.75
k 0.48-0.56 (tip), 1.1-1.4 (shoulder)
l 9.40-9.90
s 7.62 typ (shoulder)
x 0.20-0.30

Features

LSTTL/TTL Compatible: 5V Supply
Ultra High Speed
Low Input Current Required
High Common Mode Rejection
Guaranteed Performance over Temperature
3000 Vdc Withstand Test Voltage

Description

The 6N137 consists of a GaAsP emitting diode and a unique integrated detector. The photons are collected in the detector by the photodiode and then amplified by a high gain linear amplifier that drives a Schottky clamped open collector output transistor. The circuit is temperature, current and voltage compensated.
This unique isolator design provides maximum DC and AC circuit isolation between input and output while achieving LSTTL/TTL circuit compatibility. The isolator operational parameters are guaranteed from 0°C to 70°C, such that a minimum input current of 5mA will sink an eight gate fan-out (13mA) at the output with 5 volt Vcc applied to the detector. This isolation and coupling is achieved with a typical propagation delay of 45ns. The enable input provides gating of the detector with input sinking and sourcing requirements compatible with LSTTL/TTL interfacing and a propagation delay of 25ns typical. Surface Mount Option Available.
All electrical parameters are 100% tested. Specifications are guaranteed to a cumulative 0.65% AQL.

Absolute Maximum Ratings (25°C)

Storage Temperature: -55°C to +125°C
Operating Temperature: 0°C to +70°C
Lead Soldering: 260°C for 10s, 1.6mm below seating plane

Input Diode

Peak Forward Current IF: 40mA (duration <= 1ms)
Average Forward Current IF: 20mA
Reverse Voltage VR: 5V
Enable Voltage: 5.5V (not to exceed Vcc by more than 500mV)

Output Transistor

Supply Voltage VCC 7V (1 minute max)
Current IO: 50mA
Voltage VO 7V
Collector Power Dissipation: 85mW

Recommended Operating Conditions

PARAMETER SYMBOL MIN MAX UNIT
Input Current, Low Level (each channel) IFL 0 250 µA
Input Current, High Level (each channel) IFH 6.3 (*) 15 mA
High Level Enable Voltage VEH 2.0 VCC V
Low Level Enable Voltage (output high) VEL 0 0.8 V
Supply Voltage, Output VCC 4.5 5.5 V
Fan Out (TTL Load) N
8
Operating Temperature TA -55 70 °C

* 6.3mA condition permits at least 20% CTR degradation guardband. Initial switching threshold is 5mA or less.

Electrical Characteristics

(Over recommended temperature Ta= 0°C to 70°C u.o.s.; all typical values at Vcc=5V, Ta=25°C u.o.s.)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT NOTES
IOH High Level Output Current VCC=VO=5.5V, VE=2.0V, IF=250µA
50 250 µA
VOL Low Level Output Voltage VCC=5.5V, IF=5mA, VEH=2.0V, IOL(SINKING)=13mA 0.5 0.6 V
IEH High Level Enable Current VCC=5.5V, VE=2.0V -1
mA
IEL Low Level Enable Current VCC=5.5V, VE=0.5V -1.6
mA
ICCH High Level Supply Current VCC=5.5V, VE=0.5V, IF=0mA 7 15 mA
ICCL Low Level Supply Current VCC=5.5V, VE=0.5V, IF=10mA 13 18 mA
IIO Input-Output Insulation Leakage Current TA=25°C, RH=45%, t=5s, VIO=3000Vdc
1.0 µA 3
RIO Resistance TA=25°C, VIO=500V 1000
Gohm 3
CIO Capacitance TA=25°C, f=1MHz 0.6
pF 3
VF Input Forward Voltage TA=25°C, IF=10mA 1.5 1.75 V 6
BVR Input Reverse Breakdown Voltage TA=25°C, IR=10µA 5

V
CIN Input Capacitance VF=0, f=1MHz
60
pF
CTR Current Transfer Ratio IF=5mA, RL=100ohm
700
% 5

Switching Characteristics (Ta=25°C, Vcc=5V)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT NOTES
tPLH Propagation Delay Time to High Output Level RL=350ohm, IF=7.5mA, CL=15pF
45 75 µs 1
tPHL Propagation Delay Time to Low Output Level RL=350ohm, IF=7.5mA, CL=15pF 45 75 µs 1
tR-tF Output Rise-Fall Time (10-90%) RL=350ohm, IF=7.5mA, CL=15pF 25
ns
tELH Propagation Delay Time of Enable from VEH to VEL RL=350ohm, IF=7.5mA, CL=15pF, VEH=3.0V, VEL=0.5V 65 ns 2
tEHL Propagation Delay Time of Enable from VEL to VEH 15 ns 2
CMH Common Mode Transient Immunity at Logic High Output Level RL=350ohm, IF=0mA, VCM=10V, VO(MIN)=2V 50 V/µs 4
CML Common Mode Transient Immunity at Logic Low Output Level RL=350ohm, IF=5mA, VCM=10V, VO(MAX)=0.8V -150 V/µs 4

Notes

  1. The tPLH (tPHL) propagation delay is measured from the 3.75mA point on the trailing (leading) edge of the input pulse to the 1.5V point on the trailing (leading) edge of the output pulse.
  2. The tELH (tEHL) enable propagation delay is measured from the 3.75mA point on the trailing (leading) edge of the input pulse to the 1.5V point on the trailing (leading) edge of the output pulse.
  3. Device considered as two-terminaled: pins 2,3 shorted together and pins 5,6,7,8 shorted together.
  4. Common mode transient immunity in Logic High (Low) Level is the maximum tolerable, positive (negative), dVcm/dt on the leading (trailing) edge of the common mode pulse signal, Vcm, to ensure that the output will remain in a Logic High (Low) state, ie. Vo>2.0V (Vo<0.8V).
  5. DC Current Transfer Ratio is defined as the ratio of the output collector current to the forward bias input current times 100%.
  6. At 10mA, Vf decreases with increasing temperature at the rate of 1.6mV/°C.


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